diff --git a/libuavcan_drivers/stm32/driver/src/internal.hpp b/libuavcan_drivers/stm32/driver/src/internal.hpp
index 36789c2991..2bdee57a66 100644
--- a/libuavcan_drivers/stm32/driver/src/internal.hpp
+++ b/libuavcan_drivers/stm32/driver/src/internal.hpp
@@ -54,7 +54,11 @@
  * Priority mask for timer and CAN interrupts.
  */
 # ifndef UAVCAN_STM32_IRQ_PRIORITY_MASK
-#  define UAVCAN_STM32_IRQ_PRIORITY_MASK  CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
+#  if (CH_KERNEL_MAJOR == 2)
+#   define UAVCAN_STM32_IRQ_PRIORITY_MASK  CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
+#  else // ChibiOS 3
+#   define UAVCAN_STM32_IRQ_PRIORITY_MASK  CORTEX_MAX_KERNEL_PRIORITY
+#  endif
 # endif
 #endif
 
diff --git a/libuavcan_drivers/stm32/driver/src/uc_stm32_can.cpp b/libuavcan_drivers/stm32/driver/src/uc_stm32_can.cpp
index b7d4defbf8..77b8378a02 100644
--- a/libuavcan_drivers/stm32/driver/src/uc_stm32_can.cpp
+++ b/libuavcan_drivers/stm32/driver/src/uc_stm32_can.cpp
@@ -20,7 +20,7 @@
 # error "Unknown OS"
 #endif
 
-#if UAVCAN_STM32_CHIBIOS || UAVCAN_STM32_BAREMETAL
+#if (UAVCAN_STM32_CHIBIOS && CH_KERNEL_MAJOR == 2) || UAVCAN_STM32_BAREMETAL
 # if !(defined(STM32F10X_CL) || defined(STM32F2XX) || defined(STM32F4XX))
 // IRQ numbers
 #  define CAN1_RX0_IRQn USB_LP_CAN1_RX0_IRQn
@@ -33,6 +33,17 @@
 # endif
 #endif
 
+#if (UAVCAN_STM32_CHIBIOS && CH_KERNEL_MAJOR == 3)
+#define CAN1_TX_IRQHandler      STM32_CAN1_TX_HANDLER
+#define CAN1_RX0_IRQHandler     STM32_CAN1_RX0_HANDLER
+#define CAN1_RX1_IRQHandler     STM32_CAN1_RX1_HANDLER
+#define CAN1_SCE_IRQHandler     STM32_CAN1_SCE_HANDLER
+#define CAN2_TX_IRQHandler      STM32_CAN2_TX_HANDLER
+#define CAN2_RX0_IRQHandler     STM32_CAN2_RX0_HANDLER
+#define CAN2_RX1_IRQHandler     STM32_CAN2_RX1_HANDLER
+#define CAN2_SCE_IRQHandler     STM32_CAN2_SCE_HANDLER
+#endif
+
 #if UAVCAN_STM32_NUTTX
 # if !defined(STM32_IRQ_CAN1TX) && !defined(STM32_IRQ_CAN1RX0)
 #  define STM32_IRQ_CAN1TX      STM32_IRQ_USBHPCANTX
@@ -47,6 +58,17 @@ static int can2_irq(const int irq, void*);
 }
 #endif
 
+/* STM32F3's only CAN inteface does not have a number. */
+#if defined(STM32F3XX)
+#define RCC_APB1ENR_CAN1EN     RCC_APB1ENR_CANEN
+#define RCC_APB1RSTR_CAN1RST   RCC_APB1RSTR_CANRST
+#define CAN1_TX_IRQn           CAN_TX_IRQn
+#define CAN1_RX0_IRQn          CAN_RX0_IRQn
+#define CAN1_RX1_IRQn          CAN_RX1_IRQn
+#define CAN1_SCE_IRQn          CAN_SCE_IRQn
+#endif
+
+
 namespace uavcan_stm32
 {
 namespace
diff --git a/libuavcan_drivers/stm32/driver/src/uc_stm32_clock.cpp b/libuavcan_drivers/stm32/driver/src/uc_stm32_clock.cpp
index a94a543beb..d772e54423 100644
--- a/libuavcan_drivers/stm32/driver/src/uc_stm32_clock.cpp
+++ b/libuavcan_drivers/stm32/driver/src/uc_stm32_clock.cpp
@@ -14,12 +14,21 @@
 /*
  * Timer instance
  */
-# if UAVCAN_STM32_CHIBIOS || UAVCAN_STM32_BAREMETAL
+# if (UAVCAN_STM32_CHIBIOS && CH_KERNEL_MAJOR == 2) || UAVCAN_STM32_BAREMETAL
 #  define TIMX                    UAVCAN_STM32_GLUE2(TIM, UAVCAN_STM32_TIMER_NUMBER)
 #  define TIMX_IRQn               UAVCAN_STM32_GLUE3(TIM, UAVCAN_STM32_TIMER_NUMBER, _IRQn)
 #  define TIMX_INPUT_CLOCK        STM32_TIMCLK1
 # endif
 
+# if (UAVCAN_STM32_CHIBIOS && CH_KERNEL_MAJOR == 3)
+#  define TIMX                    UAVCAN_STM32_GLUE2(STM32_TIM, UAVCAN_STM32_TIMER_NUMBER)
+#  define TIMX_IRQn               UAVCAN_STM32_GLUE3(STM32_TIM, UAVCAN_STM32_TIMER_NUMBER, _NUMBER)
+#  define TIMX_IRQHandler         UAVCAN_STM32_GLUE3(STM32_TIM, UAVCAN_STM32_TIMER_NUMBER, _HANDLER)
+#  define TIMX_INPUT_CLOCK        STM32_TIMCLK1
+# else
+#  define TIMX_IRQHandler         UAVCAN_STM32_GLUE3(TIM, UAVCAN_STM32_TIMER_NUMBER, _IRQHandler)
+# endif
+
 # if UAVCAN_STM32_NUTTX
 #  define TIMX                    UAVCAN_STM32_GLUE3(STM32_TIM, UAVCAN_STM32_TIMER_NUMBER, _BASE)
 #  define  TMR_REG(o)              (TIMX + (o))
@@ -27,7 +36,6 @@
 
 #  define TIMX_IRQn                UAVCAN_STM32_GLUE2(STM32_IRQ_TIM, UAVCAN_STM32_TIMER_NUMBER)
 # endif
-# define TIMX_IRQHandler         UAVCAN_STM32_GLUE3(TIM, UAVCAN_STM32_TIMER_NUMBER, _IRQHandler)
 
 # if UAVCAN_STM32_TIMER_NUMBER >= 2 && UAVCAN_STM32_TIMER_NUMBER <= 7
 #  define TIMX_RCC_ENR           RCC->APB1ENR
diff --git a/libuavcan_drivers/stm32/driver/src/uc_stm32_thread.cpp b/libuavcan_drivers/stm32/driver/src/uc_stm32_thread.cpp
index eb93cc215f..93b8c0a85c 100644
--- a/libuavcan_drivers/stm32/driver/src/uc_stm32_thread.cpp
+++ b/libuavcan_drivers/stm32/driver/src/uc_stm32_thread.cpp
@@ -23,13 +23,25 @@ bool BusEvent::wait(uavcan::MonotonicDuration duration)
 
     if (msec <= 0)
     {
+# if (CH_KERNEL_MAJOR == 2)
         ret = sem_.waitTimeout(TIME_IMMEDIATE);
+# else // ChibiOS 3
+        ret = sem_.wait(TIME_IMMEDIATE);
+# endif
     }
     else
     {
+# if (CH_KERNEL_MAJOR == 2)
         ret = sem_.waitTimeout((msec > MaxDelayMSec) ? MS2ST(MaxDelayMSec) : MS2ST(msec));
+# else // ChibiOS 3
+        ret = sem_.wait((msec > MaxDelayMSec) ? MS2ST(MaxDelayMSec) : MS2ST(msec));
+# endif
     }
+# if (CH_KERNEL_MAJOR == 2)
     return ret == RDY_OK;
+# else // ChibiOS 3
+    return ret == MSG_OK;
+# endif
 }
 
 void BusEvent::signal()
@@ -39,9 +51,15 @@ void BusEvent::signal()
 
 void BusEvent::signalFromInterrupt()
 {
+# if (CH_KERNEL_MAJOR == 2)
     chSysLockFromIsr();
     sem_.signalI();
     chSysUnlockFromIsr();
+# else // ChibiOS 3
+    chSysLockFromISR();
+    sem_.signalI();
+    chSysUnlockFromISR();
+# endif
 }
 
 /*
@@ -54,7 +72,11 @@ void Mutex::lock()
 
 void Mutex::unlock()
 {
+# if (CH_KERNEL_MAJOR == 2)
     chibios_rt::BaseThread::unlockMutex();
+# else // ChibiOS 3
+    mtx_.unlock();
+# endif
 }
 
 #elif UAVCAN_STM32_NUTTX