AV-X board support

src/drivers/boards/av-x-v1/CMakeLists.txt

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+############################################################################
+#
+#   Copyright (c) 2016 PX4 Development Team. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name PX4 nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+px4_add_library(drivers_board
+	init.c
+	sdio.c
+	spi.c
+	timer_config.c
+)
+target_link_libraries(drivers_board
+	PRIVATE
+		drivers__led # drv_led_start
+		nuttx_apps # up_cxxinitialize
+		nuttx_arch # sdio
+		nuttx_drivers # sdio
+		parameters # param_init
+)

src/drivers/boards/av-x-v1/board_config.h

@@ -0,0 +1,474 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2018 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file board_config.h
+ *
+ * av_x-v1 internal definitions
+ */
+
+#pragma once
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include <px4_config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+#include <stm32_gpio.h>
+
+/* Configuration ************************************************************************************/
+
+#define BOARD_HAS_NBAT_V              1 // Only one Vbat to ADC
+#define BOARD_HAS_NBAT_I              0 // No Ibat ADC
+
+/* SENSORS are on SPI1, 5, 6
+ * MEMORY is on bus SPI2
+ * MS5611 is on bus SPI4
+ */
+
+#define PX4_SPI_BUS_SENSOR1  1
+#define PX4_SPI_BUS_SENSOR2  2
+#define PX4_SPI_BUS_SENSOR4  4
+#define PX4_SPI_BUS_SENSOR5  5
+
+/*  Define the Chip Selects, Data Ready and Control signals per SPI bus */
+
+/* SPI 1 CS */
+#define GPIO_SPI1_CS1_ADIS16477    /* PG10 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_SPI1_RESET_ADIS16477  /* PB15 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN15)
+
+/* SPI 2 CS */
+#define GPIO_SPI2_CS1_ADIS16497    /* PI0 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTI|GPIO_PIN10)
+
+/* SPI 4 CS */
+#define GPIO_SPI4_CS1_LPS22HB      /* PE4 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
+
+/* SPI 5 CS */
+#define GPIO_SPI5_CS1_LSM303A_M    /* PH5 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTH|GPIO_PIN5)
+#define GPIO_SPI5_CS1_LSM303A_X    /* PB0 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN0)
+
+/*  Define the SPI1 Data Ready interrupts */
+#define GPIO_SPI1_DRDY1_ADIS16477  /* PJ0 */   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTJ|GPIO_PIN0)
+
+/*  Define the SPI2 Data Ready interrupts */
+#define GPIO_SPI2_DRDY1_ADIS16497  /* PJ5 */   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTJ|GPIO_PIN5)
+
+/*  Define the SPI4 Data Ready interrupts */
+#define GPIO_SPI4_DRDY1_LPS22HB    /* PK1 */   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTK|GPIO_PIN1)
+
+/*  Define the SPI5 Data Ready interrupts */
+#define GPIO_SPI5_DRDY1_LSM303A_M  /* PK7 */   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTK|GPIO_PIN7)
+#define GPIO_SPI5_DRDY2_LSM303A_X  /* PD12 */  (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN12)
+
+/* SPI1 off */
+#define GPIO_SPI1_SCK_OFF	_PIN_OFF(GPIO_SPI1_SCK)
+#define GPIO_SPI1_MISO_OFF	_PIN_OFF(GPIO_SPI1_MISO)
+#define GPIO_SPI1_MOSI_OFF	_PIN_OFF(GPIO_SPI1_MOSI)
+
+/* SPI2 off */
+#define GPIO_SPI2_SCK_OFF	_PIN_OFF(GPIO_SPI2_SCK)
+#define GPIO_SPI2_MISO_OFF	_PIN_OFF(GPIO_SPI2_MISO)
+#define GPIO_SPI2_MOSI_OFF	_PIN_OFF(GPIO_SPI2_MOSI)
+
+/* SPI4 off */
+#define GPIO_SPI4_SCK_OFF	_PIN_OFF(GPIO_SPI4_SCK)
+#define GPIO_SPI4_MISO_OFF	_PIN_OFF(GPIO_SPI4_MISO)
+#define GPIO_SPI4_MOSI_OFF	_PIN_OFF(GPIO_SPI4_MOSI)
+
+/* SPI5 off */
+#define GPIO_SPI5_SCK_OFF	_PIN_OFF(GPIO_SPI5_SCK)
+#define GPIO_SPI5_MISO_OFF	_PIN_OFF(GPIO_SPI5_MISO)
+#define GPIO_SPI5_MOSI_OFF	_PIN_OFF(GPIO_SPI5_MOSI)
+
+
+#define GPIO_DRDY_OFF_SPI1_DRDY1_ADIS16477    _PIN_OFF(GPIO_SPI1_DRDY1_ADIS16477)
+#define GPIO_DRDY_OFF_SPI2_DRDY1_ADIS16497    _PIN_OFF(GPIO_SPI2_DRDY1_ADIS16497)
+#define GPIO_DRDY_OFF_SPI4_DRDY1_LPS22HB      _PIN_OFF(GPIO_SPI4_DRDY1_LPS22HB)
+#define GPIO_DRDY_OFF_SPI5_DRDY1_LSM303A_M    _PIN_OFF(GPIO_SPI5_DRDY1_LSM303A_M)
+#define GPIO_DRDY_OFF_SPI5_DRDY2_LSM303A_X    _PIN_OFF(GPIO_SPI5_DRDY1_LSM303A_X)
+
+/*
+ *  Define the ability to shut off off the sensor signals
+ *  by changing the signals to inputs
+ */
+#define _PIN_OFF(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_2MHz))
+
+
+/* SPI1 */
+#define PX4_SPIDEV_ADIS16477       PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSOR1,0)
+#define PX4_SENSOR1_BUS_CS_GPIO    {GPIO_SPI1_CS1_ADIS16477}
+#define PX4_SENSOR1_BUS_FIRST_CS   PX4_SPIDEV_ADIS16477
+#define PX4_SENSOR1_BUS_LAST_CS    PX4_SPIDEV_ADIS16477
+
+/* SPI2 */
+#define PX4_SPIDEV_ADIS16497       PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSOR2,0)
+#define PX4_SENSOR2_BUS_CS_GPIO    {GPIO_SPI2_CS1_ADIS16497}
+#define PX4_SENSOR2_BUS_FIRST_CS   PX4_SPIDEV_ADIS16497
+#define PX4_SENSOR2_BUS_LAST_CS    PX4_SPIDEV_ADIS16497
+
+/* SPI4 */
+#define PX4_SPIDEV_LPS22HB         PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSOR4,0)
+#define PX4_SENSOR4_BUS_CS_GPIO    {GPIO_SPI4_CS1_LPS22HB}
+#define PX4_SENSOR4_BUS_FIRST_CS   PX4_SPIDEV_LPS22HB
+#define PX4_SENSOR4_BUS_LAST_CS    PX4_SPIDEV_LPS22HB
+
+/* SPI5 */
+#define PX4_SPIDEV_LSM303A_M       PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSOR5,0)
+#define PX4_SPIDEV_LSM303A_X       PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSOR5,1)
+#define PX4_SENSOR5_BUS_CS_GPIO    {GPIO_SPI5_CS1_LSM303A_M, GPIO_SPI5_CS1_LSM303A_X}
+#define PX4_SENSOR5_BUS_FIRST_CS   PX4_SPIDEV_LSM303A_M
+#define PX4_SENSOR5_BUS_LAST_CS    PX4_SPIDEV_LSM303A_X
+
+/* I2C busses */
+#define PX4_I2C_BUS_EXPANSION	2
+#define PX4_I2C_BUS_EXPANSION1	4
+#define PX4_I2C_BUS_ONBOARD	3
+
+#define BOARD_NUMBER_I2C_BUSES  4
+#define BOARD_I2C_BUS_CLOCK_INIT {100000, 100000, 100000, 100000}
+
+/*
+ * ADC channels
+ *
+ * These are the channel numbers of the ADCs of the microcontroller that
+ * can be used by the Px4 Firmware in the adc driver
+ */
+
+/* ADC defines to be used in sensors.cpp to read from a particular channel */
+
+#define ADC1_CH(n)                      (n)
+#define ADC1_GPIO(n)                    GPIO_ADC1_IN##n
+
+/* Define GPIO pins used as ADC N.B. Channel numbers must match below */
+
+#define PX4_ADC_GPIO  \
+	/* PA0 */  ADC1_GPIO(0),  \
+	/* PA1 */  ADC1_GPIO(1),  \
+	/* PA2 */  ADC1_GPIO(2),  \
+	/* PA3 */  ADC1_GPIO(3),  \
+	/* PA4 */  ADC1_GPIO(4),  \
+	/* PB8 */  ADC1_GPIO(8),  \
+	/* PC0 */  ADC1_GPIO(10), \
+	/* PC1 */  ADC1_GPIO(11), \
+	/* PC2 */  ADC1_GPIO(12), \
+	/* PC3 */  ADC1_GPIO(13), \
+	/* PC4 */  ADC1_GPIO(14)
+
+/* Define Channel numbers must match above GPIO pin IN(n)*/
+
+#define ADC_BATTERY1_VOLTAGE_CHANNEL        /* PA0 */  ADC1_CH(0)
+#define ADC_BATTERY1_CURRENT_CHANNEL        /* PA1 */  ADC1_CH(1)
+#define ADC1_SPARE_2_CHANNEL                /* PA4 */  ADC1_CH(4)
+#define ADC_RSSI_IN_CHANNEL                 /* PB0 */  ADC1_CH(8)
+#define ADC_SCALED_V5_CHANNEL               /* PC0 */  ADC1_CH(10)
+#define ADC_SCALED_VDD_3V3_SENSORS_CHANNEL  /* PC1 */  ADC1_CH(11)
+#define ADC_HW_VER_SENSE_CHANNEL            /* PC2 */  ADC1_CH(12)
+#define ADC_HW_REV_SENSE_CHANNEL            /* PC3 */  ADC1_CH(13)
+#define ADC1_SPARE_1_CHANNEL                /* PC4 */  ADC1_CH(14)
+
+#if BOARD_HAS_NBAT_V == 2 && BOARD_HAS_NBAT_I == 2
+#define ADC_CHANNELS \
+	((1 << ADC_BATTERY1_VOLTAGE_CHANNEL)       | \
+	 (1 << ADC_BATTERY1_CURRENT_CHANNEL)       | \
+	 (1 << ADC_BATTERY2_VOLTAGE_CHANNEL)       | \
+	 (1 << ADC_BATTERY2_CURRENT_CHANNEL)       | \
+	 (1 << ADC1_SPARE_2_CHANNEL)               | \
+	 (1 << ADC_RSSI_IN_CHANNEL)                | \
+	 (1 << ADC_SCALED_V5_CHANNEL)              | \
+	 (1 << ADC_SCALED_VDD_3V3_SENSORS_CHANNEL) | \
+	 (1 << ADC_HW_VER_SENSE_CHANNEL)           | \
+	 (1 << ADC_HW_REV_SENSE_CHANNEL)           | \
+	 (1 << ADC1_SPARE_1_CHANNEL))
+#elif BOARD_HAS_NBAT_V == 1 && BOARD_HAS_NBAT_I == 1
+#define ADC_CHANNELS \
+	((1 << ADC_BATTERY1_VOLTAGE_CHANNEL)       | \
+	 (1 << ADC_BATTERY1_CURRENT_CHANNEL)       | \
+	 (1 << ADC1_SPARE_2_CHANNEL)               | \
+	 (1 << ADC_RSSI_IN_CHANNEL)                | \
+	 (1 << ADC_SCALED_V5_CHANNEL)              | \
+	 (1 << ADC_SCALED_VDD_3V3_SENSORS_CHANNEL) | \
+	 (1 << ADC_HW_VER_SENSE_CHANNEL)           | \
+	 (1 << ADC_HW_REV_SENSE_CHANNEL)           | \
+	 (1 << ADC1_SPARE_1_CHANNEL))
+#elif BOARD_HAS_NBAT_V == 1 && BOARD_HAS_NBAT_I == 0
+#define ADC_CHANNELS \
+	((1 << ADC_BATTERY1_VOLTAGE_CHANNEL)       | \
+	 (1 << ADC1_SPARE_2_CHANNEL)               | \
+	 (1 << ADC_RSSI_IN_CHANNEL)                | \
+	 (1 << ADC_SCALED_V5_CHANNEL)              | \
+	 (1 << ADC_SCALED_VDD_3V3_SENSORS_CHANNEL) | \
+	 (1 << ADC_HW_VER_SENSE_CHANNEL)           | \
+	 (1 << ADC_HW_REV_SENSE_CHANNEL)           | \
+	 (1 << ADC1_SPARE_1_CHANNEL))
+#endif
+
+/* Define Battery 1 Voltage Divider and A per V
+ */
+
+#define BOARD_BATTERY1_V_DIV         (10.133333333f)
+#define BOARD_BATTERY1_A_PER_V       (36.367515152f)
+
+/* HW has to large of R termination on ADC todo:change when HW value is chosen */
+
+#define BOARD_ADC_OPEN_CIRCUIT_V               (5.6f)
+
+/* PWM
+ *
+ * 8  PWM outputs are configured.
+ *
+ * Pins:
+ *
+ * FMU_CH1 : PA8  : TIM1_CH1
+ * FMU_CH2 : PA9  : TIM1_CH2
+ * FMU_CH3 : PA10 : TIM1_CH3
+ * FMU_CH4 : PA11 : TIM1_CH4
+ * FMU_CH5 : PA3  : TIM2_CH4
+ * FMU_CH6 : PI6  : TIM8_CH2
+ * FMU_CH7 : PF7  : TIM11_CH1
+ * FMU_CH8 : PF6  : TIM10_CH1
+ *
+ */
+#define GPIO_TIM1_CH1OUT      /* PA8   T1C1   FMU1 */ GPIO_TIM1_CH1OUT_1
+#define GPIO_TIM1_CH2OUT      /* PA9   T1C2   FMU2 */ GPIO_TIM1_CH2OUT_1
+#define GPIO_TIM1_CH3OUT      /* PA10  T1C3   FMU3 */ GPIO_TIM1_CH3OUT_1
+#define GPIO_TIM1_CH4OUT      /* PA11  T1C4   FMU4 */ GPIO_TIM1_CH4OUT_1
+#define GPIO_TIM2_CH4OUT      /* PA3   T2C4   FMU5 */ GPIO_TIM2_CH4OUT_1
+#define GPIO_TIM8_CH2OUT      /* PI6   T8C2   FMU6 */ GPIO_TIM8_CH2IN_2
+#define GPIO_TIM11_CH1OUT     /* PF7   T11C1  FMU7 */ GPIO_TIM11_CH1OUT_2
+#define GPIO_TIM10_CH1OUT     /* PF6   T10C1  FMU8 */ GPIO_TIM10_CH1OUT_2
+
+#define DIRECT_PWM_OUTPUT_CHANNELS  8
+
+#define GPIO_TIM1_CH1IN      /* PA8   T1C1   FMU1 */ GPIO_TIM1_CH1IN_1
+#define GPIO_TIM1_CH2IN      /* PA9   T1C2   FMU2 */ GPIO_TIM1_CH2IN_1
+#define GPIO_TIM1_CH3IN      /* PA10  T1C3   FMU3 */ GPIO_TIM1_CH3IN_1
+#define GPIO_TIM1_CH4IN      /* PA11  T1C4   FMU4 */ GPIO_TIM1_CH4IN_1
+#define GPIO_TIM2_CH4IN      /* PA3   T2C4   FMU5 */ GPIO_TIM2_CH4IN_1
+#define GPIO_TIM8_CH2IN      /* PI6   T8C2   FMU6 */ GPIO_TIM8_CH2IN_2
+//#define GPIO_TIM11_CH1IN     /* PF7   T11C1  FMU7 */ GPIO_TIM11_CH1IN_2
+//#define GPIO_TIM10_CH1IN     /* PF6   T10C1  FMU8 */ GPIO_TIM10_CH1IN_2
+
+#define DIRECT_INPUT_TIMER_CHANNELS  8
+
+/* User GPIOs
+ *
+ * GPIO0-5 are the PWM servo outputs.
+ */
+
+#define _MK_GPIO_INPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLUP))
+
+#define GPIO_GPIO0_INPUT        /* PA8  T1C1   FMU1 */ _MK_GPIO_INPUT(GPIO_TIM1_CH1IN)
+#define GPIO_GPIO1_INPUT        /* PA9  T1C2   FMU2 */ _MK_GPIO_INPUT(GPIO_TIM1_CH2IN)
+#define GPIO_GPIO2_INPUT        /* PA10 T1C3   FMU3 */ _MK_GPIO_INPUT(GPIO_TIM1_CH3IN)
+#define GPIO_GPIO3_INPUT        /* PA11 T1C4   FMU4 */ _MK_GPIO_INPUT(GPIO_TIM1_CH4IN)
+#define GPIO_GPIO4_INPUT        /* PA3  T2C4   FMU5 */ _MK_GPIO_INPUT(GPIO_TIM2_CH4IN_1)
+#define GPIO_GPIO5_INPUT        /* PI6  T8C2   FMU6 */ _MK_GPIO_INPUT(GPIO_TIM8_CH2IN_2)
+#define GPIO_GPIO6_INPUT        /* PF7  T11C1  FMU7 */ _MK_GPIO_INPUT(GPIO_TIM11_CH1IN_2)
+#define GPIO_GPIO7_INPUT        /* PF6  T10C1  FMU8 */ _MK_GPIO_INPUT(GPIO_TIM10_CH1IN_2)
+
+#define _MK_GPIO_OUTPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR))
+
+#define GPIO_GPIO0_OUTPUT        /* PA8  T1C1   FMU1 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH1OUT)
+#define GPIO_GPIO1_OUTPUT        /* PA9  T1C2   FMU2 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH2OUT)
+#define GPIO_GPIO2_OUTPUT        /* PA10 T1C3   FMU3 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH3OUT)
+#define GPIO_GPIO3_OUTPUT        /* PA11 T1C4   FMU4 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH4OUT)
+#define GPIO_GPIO4_OUTPUT        /* PA3  T2C4   FMU5 */ _MK_GPIO_OUTPUT(GPIO_TIM2_CH4OUT_1)
+#define GPIO_GPIO5_OUTPUT        /* PI6  T8C2   FMU6 */ _MK_GPIO_OUTPUT(GPIO_TIM8_CH2OUT_2)
+#define GPIO_GPIO6_OUTPUT        /* PF7  T11C1  FMU7 */ _MK_GPIO_OUTPUT(GPIO_TIM11_CH1OUT_2)
+#define GPIO_GPIO7_OUTPUT        /* PF6  T10C1  FMU8 */ _MK_GPIO_OUTPUT(GPIO_TIM10_CH1OUT_2)
+
+/* High-resolution timer */
+#define HRT_TIMER		     5  /* use timer5 for the HRT */
+#define HRT_TIMER_CHANNEL    1  /* use capture/compare channel 3 */
+
+//#define RC_UXART_BASE        STM32_USART6_BASE /* NOT FMUv5 test HW ONLY*/
+//#define RC_SERIAL_PORT       "/dev/ttyS4"
+
+#define GPS_DEFAULT_UART_PORT "/dev/ttyS5" /* UART1 on FMUv5 */
+
+/* Power switch controls ******************************************************/
+
+#define SDIO_SLOTNO                    0  /* Only one slot */
+#define SDIO_MINOR                     0
+
+/* SD card bringup does not work if performed on the IDLE thread because it
+ * will cause waiting.  Use either:
+ *
+ *  CONFIG_LIB_BOARDCTL=y, OR
+ *  CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y
+ */
+
+#if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && !defined(CONFIG_BOARD_INITTHREAD)
+#  warning SDIO initialization cannot be perfomed on the IDLE thread
+#endif
+
+#define	BOARD_NAME "AV_X_V1"
+
+/* AV-X_V1 never powers off the Servo rail */
+
+#define BOARD_ADC_SERVO_VALID     (1)
+
+#define ADC_BATTERY_VOLTAGE_CHANNEL  0
+#define ADC_BATTERY_CURRENT_CHANNEL  1 // TODO: review
+
+#define BOARD_ADC_PERIPH_5V_OC  (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
+#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
+
+#define BOARD_HAS_PWM	DIRECT_PWM_OUTPUT_CHANNELS
+
+#define BOARD_FMU_GPIO_TAB { \
+		{GPIO_GPIO0_INPUT,       GPIO_GPIO0_OUTPUT,              0}, \
+		{GPIO_GPIO1_INPUT,       GPIO_GPIO1_OUTPUT,              0}, \
+		{GPIO_GPIO2_INPUT,       GPIO_GPIO2_OUTPUT,              0}, \
+		{GPIO_GPIO3_INPUT,       GPIO_GPIO3_OUTPUT,              0}, \
+		{GPIO_GPIO4_INPUT,       GPIO_GPIO4_OUTPUT,              0}, \
+		{GPIO_GPIO5_INPUT,       GPIO_GPIO5_OUTPUT,              0}, \
+		{GPIO_GPIO6_INPUT,       GPIO_GPIO6_OUTPUT,              0}, \
+		{GPIO_GPIO7_INPUT,       GPIO_GPIO7_OUTPUT,              0}, \
+	}
+
+/*
+ * GPIO numbers.
+ *
+ * There are no alternate functions on this board.
+ */
+#define GPIO_SERVO_1                (1<<0)   /**< servo 1 output */
+#define GPIO_SERVO_2                (1<<1)   /**< servo 2 output */
+#define GPIO_SERVO_3                (1<<2)   /**< servo 3 output */
+#define GPIO_SERVO_4                (1<<3)   /**< servo 4 output */
+#define GPIO_SERVO_5                (1<<4)   /**< servo 5 output */
+#define GPIO_SERVO_6                (1<<5)   /**< servo 6 output */
+#define GPIO_SERVO_7                (1<<6)   /**< servo 7 output */
+#define GPIO_SERVO_8                (1<<7)   /**< servo 8 output */
+
+/* This board provides a DMA pool and APIs */
+
+#define BOARD_DMA_ALLOC_POOL_SIZE 5120
+
+/* This board provides the board_on_reset interface */
+
+#define BOARD_HAS_ON_RESET 1
+
+/* The list of GPIO that will be initialized */
+
+#define PX4_GPIO_PWM_INIT_LIST { \
+		GPIO_GPIO7_INPUT, \
+		GPIO_GPIO6_INPUT, \
+		GPIO_GPIO5_INPUT, \
+		GPIO_GPIO4_INPUT, \
+		GPIO_GPIO3_INPUT, \
+		GPIO_GPIO2_INPUT, \
+		GPIO_GPIO1_INPUT, \
+		GPIO_GPIO0_INPUT, \
+	}
+
+#define PX4_GPIO_INIT_LIST { \
+		PX4_ADC_GPIO,                     \
+	}
+
+__BEGIN_DECLS
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public data
+ ****************************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+int stm32_sdio_initialize(void);
+
+/****************************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the PX4FMU board.
+ *
+ ****************************************************************************************************/
+
+extern void stm32_spiinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_spi_bus_initialize
+ *
+ * Description:
+ *   Called to configure SPI Buses.
+ *
+ ************************************************************************************/
+
+extern int stm32_spi_bus_initialize(void);
+
+void board_spi_reset(int ms);
+#define board_peripheral_reset(ms)
+
+/****************************************************************************
+ * Name: nsh_archinitialize
+ *
+ * Description:
+ *   Perform architecture specific initialization for NSH.
+ *
+ *   CONFIG_NSH_ARCHINIT=y :
+ *     Called from the NSH library
+ *
+ *   CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
+ *   CONFIG_NSH_ARCHINIT=n :
+ *     Called from board_initialize().
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NSH_LIBRARY
+int nsh_archinitialize(void);
+#endif
+
+#include "../common/board_common.h"
+
+#endif /* __ASSEMBLY__ */
+
+__END_DECLS

src/drivers/boards/av-x-v1/init.c

@@ -0,0 +1,364 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2018 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file init.c
+ *
+ * PX4FMU-specific early startup code.  This file implements the
+ * nsh_archinitialize() function that is called early by nsh during startup.
+ *
+ * Code here is run before the rcS script is invoked; it should start required
+ * subsystems and perform board-specific initialisation.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <px4_config.h>
+#include <px4_tasks.h>
+#include <px4_log.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+
+#include "platform/cxxinitialize.h"
+#include <nuttx/board.h>
+#include <nuttx/spi/spi.h>
+#include <nuttx/i2c/i2c_master.h>
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+#include <nuttx/analog/adc.h>
+#include <nuttx/mm/gran.h>
+
+#include <chip.h>
+#include "board_config.h"
+
+#include <stm32_uart.h>
+
+#include <arch/board/board.h>
+
+#include <drivers/drv_hrt.h>
+#include <drivers/drv_board_led.h>
+
+#include <systemlib/px4_macros.h>
+#include <systemlib/cpuload.h>
+#include <perf/perf_counter.h>
+#include <systemlib/err.h>
+
+#include <systemlib/hardfault_log.h>
+
+#include <parameters/param.h>
+
+#include "up_internal.h"
+
+/************************************************************************************
+ * Name: board_on_reset
+ *
+ * Description:
+ * Optionally provided function called on entry to board_system_reset
+ * It should perform any house keeping prior to the rest.
+ *
+ * status - 1 if resetting to boot loader
+ *          0 if just resetting
+ *
+ ************************************************************************************/
+__EXPORT void board_on_reset(int status)
+{
+	/* configure the GPIO pins to outputs and keep them low */
+
+	const uint32_t gpio[] = PX4_GPIO_PWM_INIT_LIST;
+	board_gpio_init(gpio, arraySize(gpio));
+
+	if (status >= 0) {
+		up_mdelay(6);
+	}
+}
+
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+__EXPORT void
+stm32_boardinitialize(void)
+{
+	board_on_reset(-1); /* Reset PWM first thing */
+
+	/* configure LEDs */
+	board_autoled_initialize();
+
+	/* configure pins */
+	const uint32_t gpio[] = PX4_GPIO_INIT_LIST;
+	board_gpio_init(gpio, arraySize(gpio));
+
+	/* configure SPI interfaces */
+	stm32_spiinitialize();
+}
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+
+__EXPORT int board_app_initialize(uintptr_t arg)
+{
+	/* run C++ ctors before we go any further */
+	up_cxxinitialize();
+
+	/* configure the high-resolution time/callout interface */
+	hrt_init();
+
+	param_init();
+
+	/* configure the DMA allocator */
+
+	if (board_dma_alloc_init() < 0) {
+		PX4_ERR("DMA alloc FAILED");
+	}
+
+	/* configure CPU load estimation */
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+	cpuload_initialize_once();
+#endif
+
+	/* set up the serial DMA polling */
+	static struct hrt_call serial_dma_call;
+	struct timespec ts;
+
+	/*
+	 * Poll at 1ms intervals for received bytes that have not triggered
+	 * a DMA event.
+	 */
+	ts.tv_sec = 0;
+	ts.tv_nsec = 1000000;
+
+	hrt_call_every(&serial_dma_call,
+		       ts_to_abstime(&ts),
+		       ts_to_abstime(&ts),
+		       (hrt_callout)stm32_serial_dma_poll,
+		       NULL);
+
+#if defined(CONFIG_STM32F7_BBSRAM)
+
+	/* NB. the use of the console requires the hrt running
+	 * to poll the DMA
+	 */
+
+	/* Using Battery Backed Up SRAM */
+
+	int filesizes[CONFIG_STM32F7_BBSRAM_FILES + 1] = BSRAM_FILE_SIZES;
+
+	stm32_bbsraminitialize(BBSRAM_PATH, filesizes);
+
+#if defined(CONFIG_STM32F7_SAVE_CRASHDUMP)
+
+	/* Panic Logging in Battery Backed Up Files */
+
+	/*
+	 * In an ideal world, if a fault happens in flight the
+	 * system save it to BBSRAM will then reboot. Upon
+	 * rebooting, the system will log the fault to disk, recover
+	 * the flight state and continue to fly.  But if there is
+	 * a fault on the bench or in the air that prohibit the recovery
+	 * or committing the log to disk, the things are too broken to
+	 * fly. So the question is:
+	 *
+	 * Did we have a hard fault and not make it far enough
+	 * through the boot sequence to commit the fault data to
+	 * the SD card?
+	 */
+
+	/* Do we have an uncommitted hard fault in BBSRAM?
+	 *  - this will be reset after a successful commit to SD
+	 */
+	int hadCrash = hardfault_check_status("boot");
+
+	if (hadCrash == OK) {
+
+		PX4_ERR("[boot] There is a hard fault logged. Hold down the SPACE BAR," \
+			" while booting to halt the system!\n");
+
+		/* Yes. So add one to the boot count - this will be reset after a successful
+		 * commit to SD
+		 */
+
+		int reboots = hardfault_increment_reboot("boot", false);
+
+		/* Also end the misery for a user that holds for a key down on the console */
+
+		int bytesWaiting;
+		ioctl(fileno(stdin), FIONREAD, (unsigned long)((uintptr_t) &bytesWaiting));
+
+		if (reboots > 2 || bytesWaiting != 0) {
+
+			/* Since we can not commit the fault dump to disk. Display it
+			 * to the console.
+			 */
+
+			hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
+
+			PX4_ERR("[boot] There were %d reboots with Hard fault that were not committed to disk - System halted %s\n",
+				reboots,
+				(bytesWaiting == 0 ? "" : " Due to Key Press\n"));
+
+
+			/* For those of you with a debugger set a break point on up_assert and
+			 * then set dbgContinue = 1 and go.
+			 */
+
+			/* Clear any key press that got us here */
+
+			static volatile bool dbgContinue = false;
+			int c = '>';
+
+			while (!dbgContinue) {
+
+				switch (c) {
+
+				case EOF:
+
+
+				case '\n':
+				case '\r':
+				case ' ':
+					continue;
+
+				default:
+
+					putchar(c);
+					putchar('\n');
+
+					switch (c) {
+
+					case 'D':
+					case 'd':
+						hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
+						break;
+
+					case 'C':
+					case 'c':
+						hardfault_rearm("boot");
+						hardfault_increment_reboot("boot", true);
+						break;
+
+					case 'B':
+					case 'b':
+						dbgContinue = true;
+						break;
+
+					default:
+						break;
+					} // Inner Switch
+
+					PX4_ERR("\nEnter B - Continue booting\n" \
+						"Enter C - Clear the fault log\n" \
+						"Enter D - Dump fault log\n\n?>");
+					fflush(stdout);
+
+					if (!dbgContinue) {
+						c = getchar();
+					}
+
+					break;
+
+				} // outer switch
+			} // for
+
+		} // inner if
+	} // outer if
+
+#endif // CONFIG_STM32F7_SAVE_CRASHDUMP
+#endif // CONFIG_STM32F7_BBSRAM
+
+
+#ifdef CONFIG_SPI
+	int ret = stm32_spi_bus_initialize();
+
+	if (ret != OK) {
+		PX4_ERR("SPI init failed");
+		return ret;
+	}
+
+#endif
+
+#ifdef CONFIG_MMCSD
+
+	ret = stm32_sdio_initialize();
+
+	if (ret != OK) {
+		board_autoled_on(LED_RED);
+		PX4_ERR("SDIO init failed");
+		return ret;
+	}
+
+#endif
+
+	//board_spi_reset(10);
+
+	// ethernet switch
+	//uint8_t txdata[] = {0x51, 0x00, 0x21, 0x00}; //0x5100, 0x2100 MSB to LSB here.
+	//HAL_I2C_Master_Transmit(&hi2c3, (uint16_t)(0x5F<<1), txdata, 4, 0xFFFF);
+
+	return OK;
+}

src/drivers/boards/av-x-v1/sdio.c

@@ -0,0 +1,173 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <px4_config.h>
+#include <px4_log.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "chip.h"
+#include "board_config.h"
+#include "stm32_gpio.h"
+#include "stm32_sdmmc.h"
+
+#ifdef CONFIG_MMCSD
+
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Card detections requires card support and a card detection GPIO */
+
+#define HAVE_NCD   1
+#if !defined(GPIO_SDMMC1_NCD)
+#  undef HAVE_NCD
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static FAR struct sdio_dev_s *sdio_dev;
+#ifdef HAVE_NCD
+static bool g_sd_inserted = 0xff; /* Impossible value */
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ncd_interrupt
+ *
+ * Description:
+ *   Card detect interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_NCD
+static int stm32_ncd_interrupt(int irq, FAR void *context)
+{
+	bool present;
+
+	present = !stm32_gpioread(GPIO_SDMMC1_NCD);
+
+	if (sdio_dev && present != g_sd_inserted) {
+		sdio_mediachange(sdio_dev, present);
+		g_sd_inserted = present;
+	}
+
+	return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+int stm32_sdio_initialize(void)
+{
+	int ret;
+
+#ifdef HAVE_NCD
+	/* Card detect */
+	bool cd_status;
+
+	/* Configure the card detect GPIO */
+	stm32_configgpio(GPIO_SDMMC1_NCD);
+
+	/* Register an interrupt handler for the card detect pin */
+	stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true, stm32_ncd_interrupt);
+#endif
+
+	/* Mount the SDIO-based MMC/SD block driver */
+	/* First, get an instance of the SDIO interface */
+	finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
+
+	sdio_dev = sdio_initialize(SDIO_SLOTNO);
+
+	if (!sdio_dev) {
+		PX4_ERR("[boot] Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
+		return -ENODEV;
+	}
+
+	/* Now bind the SDIO interface to the MMC/SD driver */
+
+	finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
+
+	ret = mmcsd_slotinitialize(SDIO_MINOR, sdio_dev);
+
+	if (ret != OK) {
+		PX4_ERR("[boot] Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+		return ret;
+	}
+
+	finfo("Successfully bound SDIO to the MMC/SD driver\n");
+
+#ifdef HAVE_NCD
+	/* Use SD card detect pin to check if a card is g_sd_inserted */
+
+	cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD);
+	finfo("Card detect : %d\n", cd_status);
+
+	sdio_mediachange(sdio_dev, cd_status);
+#else
+	/* Assume that the SD card is inserted.  What choice do we have? */
+
+	sdio_mediachange(sdio_dev, true);
+#endif
+
+	return OK;
+}
+
+#endif /* CONFIG_MMCSD */

src/drivers/boards/av-x-v1/spi.c

@@ -0,0 +1,429 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2018 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file px4fmu_spi.c
+ *
+ * Board-specific SPI functions.
+ */
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <px4_config.h>
+#include <px4_log.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+#include <unistd.h>
+
+#include <nuttx/spi/spi.h>
+#include <arch/board/board.h>
+#include <systemlib/px4_macros.h>
+
+#include <up_arch.h>
+#include <chip.h>
+#include <stm32_gpio.h>
+#include "board_config.h"
+#include <systemlib/err.h>
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* Debug ********************************************************************/
+
+/* Define CS GPIO array */
+static const uint32_t spi1selects_gpio[] = PX4_SENSOR1_BUS_CS_GPIO;
+static const uint32_t spi2selects_gpio[] = PX4_SENSOR2_BUS_CS_GPIO;
+static const uint32_t spi4selects_gpio[] = PX4_SENSOR4_BUS_CS_GPIO;
+static const uint32_t spi5selects_gpio[] = PX4_SENSOR5_BUS_CS_GPIO;
+
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the PX4FMU board.
+ *
+ ************************************************************************************/
+
+__EXPORT void stm32_spiinitialize(void)
+{
+	board_gpio_init(spi1selects_gpio, arraySize(spi1selects_gpio));
+	board_gpio_init(spi2selects_gpio, arraySize(spi2selects_gpio));
+	board_gpio_init(spi4selects_gpio, arraySize(spi4selects_gpio));
+	board_gpio_init(spi5selects_gpio, arraySize(spi5selects_gpio));
+}
+
+/************************************************************************************
+ * Name: stm32_spi_bus_initialize
+ *
+ * Description:
+ *   Called to configure SPI buses on PX4FMU board.
+ *
+ ************************************************************************************/
+static struct spi_dev_s *spi_sensor1;
+static struct spi_dev_s *spi_sensor2;
+static struct spi_dev_s *spi_sensor4;
+static struct spi_dev_s *spi_sensor5;
+
+__EXPORT int stm32_spi_bus_initialize(void)
+{
+	/* Configure SPI-based devices */
+
+
+	/* Get the SPI port for the Sensors */
+	spi_sensor1 = stm32_spibus_initialize(PX4_SPI_BUS_SENSOR1);
+
+	if (!spi_sensor1) {
+		PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSOR1);
+		return -ENODEV;
+	}
+
+	/* Default PX4_SPI_BUS_SENSORS to 1MHz and de-assert the known chip selects. */
+	SPI_SETFREQUENCY(spi_sensor1, 1000000);
+	SPI_SETBITS(spi_sensor1, 16);
+	SPI_SETMODE(spi_sensor1, SPIDEV_MODE3);
+
+	for (int cs = PX4_SENSOR1_BUS_FIRST_CS; cs <= PX4_SENSOR1_BUS_LAST_CS; cs++) {
+		SPI_SELECT(spi_sensor1, cs, false);
+	}
+
+
+	/* Get the SPI port for the Memory */
+	spi_sensor2 = stm32_spibus_initialize(PX4_SPI_BUS_SENSOR2);
+
+	if (!spi_sensor2) {
+		PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSOR2);
+		return -ENODEV;
+	}
+
+	/* Default PX4_SPI_BUS_SENSOR2 to 1MHz and de-assert the known chip selects. */
+	SPI_SETFREQUENCY(spi_sensor2, 1000000);
+	SPI_SETBITS(spi_sensor2, 8);
+	SPI_SETMODE(spi_sensor2, SPIDEV_MODE3);
+
+	for (int cs = PX4_SENSOR2_BUS_FIRST_CS; cs <= PX4_SENSOR2_BUS_LAST_CS; cs++) {
+		SPI_SELECT(spi_sensor2, cs, false);
+	}
+
+
+	/* Get the SPI port for the BARO */
+	spi_sensor4 = stm32_spibus_initialize(PX4_SPI_BUS_SENSOR4);
+
+	if (!spi_sensor4) {
+		PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSOR4);
+		return -ENODEV;
+	}
+
+	SPI_SETFREQUENCY(spi_sensor4, 1 * 1000 * 1000);
+	SPI_SETBITS(spi_sensor4, 8);
+	SPI_SETMODE(spi_sensor4, SPIDEV_MODE3);
+
+	for (int cs = PX4_SENSOR4_BUS_FIRST_CS; cs <= PX4_SENSOR4_BUS_LAST_CS; cs++) {
+		SPI_SELECT(spi_sensor4, cs, false);
+	}
+
+
+	/* Get the SPI port for the PX4_SPI_EXTERNAL1 */
+	spi_sensor5 = stm32_spibus_initialize(PX4_SPI_BUS_SENSOR5);
+
+	if (!spi_sensor5) {
+		PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSOR5);
+		return -ENODEV;
+	}
+
+	SPI_SETFREQUENCY(spi_sensor5, 1 * 1000 * 1000);
+	SPI_SETBITS(spi_sensor5, 8);
+	SPI_SETMODE(spi_sensor5, SPIDEV_MODE3);
+
+	for (int cs = PX4_SENSOR5_BUS_FIRST_CS; cs <= PX4_SENSOR5_BUS_LAST_CS; cs++) {
+		SPI_SELECT(spi_sensor5, cs, false);
+	}
+
+	return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_spi1select and stm32_spi1status
+ *
+ * Description:
+ *   Called by stm32 spi driver on bus 1.
+ *
+ ************************************************************************************/
+
+__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+{
+	/* SPI select is active low, so write !selected to select the device */
+	int sel = (int) devid;
+	ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SENSOR1);
+
+	/* Making sure the other peripherals are not selected */
+	for (size_t cs = 0; arraySize(spi1selects_gpio) > 1 && cs < arraySize(spi1selects_gpio); cs++) {
+		if (spi1selects_gpio[cs] != 0) {
+			stm32_gpiowrite(spi1selects_gpio[cs], 1);
+		}
+	}
+
+	uint32_t gpio = spi1selects_gpio[PX4_SPI_DEV_ID(sel)];
+
+	if (gpio) {
+		stm32_gpiowrite(gpio, !selected);
+	}
+}
+
+__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+	return SPI_STATUS_PRESENT;
+}
+
+
+/************************************************************************************
+ * Name: stm32_spi2select and stm32_spi2status
+ *
+ * Description:
+ *   Called by stm32 spi driver on bus 2.
+ *
+ ************************************************************************************/
+
+__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+{
+	/* SPI select is active low, so write !selected to select the device */
+	int sel = (int) devid;
+	ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SENSOR2);
+
+	/* Making sure the other peripherals are not selected */
+
+	for (int cs = 0;  arraySize(spi2selects_gpio) > 1 && cs < arraySize(spi2selects_gpio); cs++) {
+		if (spi2selects_gpio[cs] != 0) {
+			stm32_gpiowrite(spi2selects_gpio[cs], 1);
+		}
+	}
+
+	uint32_t gpio = spi2selects_gpio[PX4_SPI_DEV_ID(sel)];
+
+	if (gpio) {
+		stm32_gpiowrite(gpio, !selected);
+	}
+}
+
+__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+	return SPI_STATUS_PRESENT;
+}
+
+
+/************************************************************************************
+ * Name: stm32_spi4select and stm32_spi4status
+ *
+ * Description:
+ *   Called by stm32 spi driver on bus 4.
+ *
+ ************************************************************************************/
+
+__EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+{
+	int sel = (int) devid;
+	ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SENSOR4);
+
+	/* Making sure the other peripherals are not selected */
+	for (size_t cs = 0; arraySize(spi4selects_gpio) > 1 && cs < arraySize(spi4selects_gpio); cs++) {
+		stm32_gpiowrite(spi4selects_gpio[cs], 1);
+	}
+
+	uint32_t gpio = spi4selects_gpio[PX4_SPI_DEV_ID(sel)];
+
+	if (gpio) {
+		stm32_gpiowrite(gpio, !selected);
+	}
+}
+
+__EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+	return SPI_STATUS_PRESENT;
+}
+
+/************************************************************************************
+ * Name: stm32_spi5select and stm32_spi5status
+ *
+ * Description:
+ *   Called by stm32 spi driver on bus 5.
+ *
+ ************************************************************************************/
+
+__EXPORT void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+{
+	/* SPI select is active low, so write !selected to select the device */
+	int sel = (int) devid;
+	ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SENSOR5);
+
+	/* Making sure the other peripherals are not selected */
+	for (size_t cs = 0; arraySize(spi5selects_gpio) > 1 && cs < arraySize(spi5selects_gpio); cs++) {
+		stm32_gpiowrite(spi5selects_gpio[cs], 1);
+	}
+
+	uint32_t gpio = spi5selects_gpio[PX4_SPI_DEV_ID(sel)];
+
+	if (gpio) {
+		stm32_gpiowrite(gpio, !selected);
+	}
+}
+
+__EXPORT uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+	return SPI_STATUS_PRESENT;
+}
+
+
+/************************************************************************************
+ * Name: board_spi_reset
+ *
+ * Description:
+ *
+ *
+ ************************************************************************************/
+
+__EXPORT void board_spi_reset(int ms)
+{
+	/* disable SPI bus */
+
+	// SPI1
+	for (size_t cs = 0;  arraySize(spi1selects_gpio) > 1 && cs < arraySize(spi1selects_gpio); cs++) {
+		if (spi1selects_gpio[cs] != 0) {
+			stm32_configgpio(_PIN_OFF(spi1selects_gpio[cs]));
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI1_SCK_OFF);
+	stm32_configgpio(GPIO_SPI1_MISO_OFF);
+	stm32_configgpio(GPIO_SPI1_MOSI_OFF);
+
+	// SPI2
+	for (size_t cs = 0;  arraySize(spi2selects_gpio) > 1 && cs < arraySize(spi2selects_gpio); cs++) {
+		if (spi2selects_gpio[cs] != 0) {
+			stm32_configgpio(_PIN_OFF(spi2selects_gpio[cs]));
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI2_SCK_OFF);
+	stm32_configgpio(GPIO_SPI2_MISO_OFF);
+	stm32_configgpio(GPIO_SPI2_MOSI_OFF);
+
+	// SPI4
+	for (size_t cs = 0;  arraySize(spi4selects_gpio) > 1 && cs < arraySize(spi4selects_gpio); cs++) {
+		if (spi4selects_gpio[cs] != 0) {
+			stm32_configgpio(_PIN_OFF(spi4selects_gpio[cs]));
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI4_SCK_OFF);
+	stm32_configgpio(GPIO_SPI4_MISO_OFF);
+	stm32_configgpio(GPIO_SPI4_MOSI_OFF);
+
+	// SPI5
+	for (size_t cs = 0;  arraySize(spi5selects_gpio) > 1 && cs < arraySize(spi5selects_gpio); cs++) {
+		if (spi5selects_gpio[cs] != 0) {
+			stm32_configgpio(_PIN_OFF(spi5selects_gpio[cs]));
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI5_SCK_OFF);
+	stm32_configgpio(GPIO_SPI5_MISO_OFF);
+	stm32_configgpio(GPIO_SPI5_MOSI_OFF);
+
+
+	/* wait for the sensor rail to reach GND */
+	usleep(ms * 1000);
+	PX4_INFO("reset done, %d ms", ms);
+
+	/* re-enable power */
+
+	/* wait a bit before starting SPI, different times didn't influence results */
+	usleep(100);
+
+	/* reconfigure the SPI pins */
+
+	// SPI1
+	for (size_t cs = 0; arraySize(spi1selects_gpio) > 1 && cs < arraySize(spi1selects_gpio); cs++) {
+		if (spi1selects_gpio[cs] != 0) {
+			stm32_configgpio(spi1selects_gpio[cs]);
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI1_SCK);
+	stm32_configgpio(GPIO_SPI1_MISO);
+	stm32_configgpio(GPIO_SPI1_MOSI);
+
+	// SPI2
+	for (size_t cs = 0; arraySize(spi2selects_gpio) > 1 && cs < arraySize(spi2selects_gpio); cs++) {
+		if (spi2selects_gpio[cs] != 0) {
+			stm32_configgpio(spi2selects_gpio[cs]);
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI2_SCK);
+	stm32_configgpio(GPIO_SPI2_MISO);
+	stm32_configgpio(GPIO_SPI2_MOSI);
+
+	// SPI4
+	for (size_t cs = 0; arraySize(spi4selects_gpio) > 1 && cs < arraySize(spi4selects_gpio); cs++) {
+		if (spi4selects_gpio[cs] != 0) {
+			stm32_configgpio(spi4selects_gpio[cs]);
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI4_SCK);
+	stm32_configgpio(GPIO_SPI4_MISO);
+	stm32_configgpio(GPIO_SPI4_MOSI);
+
+	// SPI5
+	for (size_t cs = 0; arraySize(spi5selects_gpio) > 1 && cs < arraySize(spi5selects_gpio); cs++) {
+		if (spi5selects_gpio[cs] != 0) {
+			stm32_configgpio(spi5selects_gpio[cs]);
+		}
+	}
+
+	stm32_configgpio(GPIO_SPI5_SCK);
+	stm32_configgpio(GPIO_SPI5_MISO);
+	stm32_configgpio(GPIO_SPI5_MOSI);
+
+}

src/drivers/boards/av-x-v1/timer_config.c

@@ -0,0 +1,173 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2018 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/*
+ * @file px4fmu_timer_config.c
+ *
+ * Configuration data for the stm32 pwm_servo, input capture and pwm input driver.
+ *
+ * Note that these arrays must always be fully-sized.
+ */
+
+#include <stdint.h>
+
+#include <chip.h>
+#include <stm32_gpio.h>
+#include <stm32_tim.h>
+
+#include <drivers/drv_pwm_output.h>
+#include <drivers/stm32/drv_io_timer.h>
+
+#include "board_config.h"
+
+__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
+	{
+		.base = STM32_TIM1_BASE,
+		.clock_register = STM32_RCC_APB2ENR,
+		.clock_bit = RCC_APB2ENR_TIM1EN,
+		.clock_freq = STM32_APB2_TIM1_CLKIN,
+		.first_channel_index = 0,
+		.last_channel_index = 3,
+		.handler = io_timer_handler0,
+		.vectorno = STM32_IRQ_TIM1CC,
+
+	},
+	{
+		.base = STM32_TIM2_BASE,
+		.clock_register = STM32_RCC_APB1ENR,
+		.clock_bit = RCC_APB1ENR_TIM2EN,
+		.clock_freq = STM32_APB1_TIM2_CLKIN,
+		.first_channel_index = 3,
+		.last_channel_index = 3,
+		.handler = io_timer_handler1,
+		.vectorno = STM32_IRQ_TIM2,
+	},
+	{
+		.base = STM32_TIM8_BASE,
+		.clock_register = STM32_RCC_APB1ENR,
+		.clock_bit = RCC_APB2ENR_TIM10EN,
+		.clock_freq = STM32_APB2_TIM8_CLKIN,
+		.first_channel_index = 3,
+		.last_channel_index = 3,
+		.handler = io_timer_handler2,
+		.vectorno = STM32_IRQ_TIM8CC, // REVIEW
+	},
+	{
+		.base = STM32_TIM11_BASE,
+		.clock_register = STM32_RCC_APB1ENR,
+		.clock_bit = RCC_APB2ENR_TIM11EN,
+		.clock_freq = STM32_APB2_TIM11_CLKIN,
+		.first_channel_index = 2,
+		.last_channel_index = 2,
+		.handler = io_timer_handler3,
+		.vectorno = STM32_IRQ_TIM11,
+	},
+	{
+		.base = STM32_TIM10_BASE,
+		.clock_register = STM32_RCC_APB2ENR,
+		.clock_bit = RCC_APB2ENR_TIM10EN,
+		.clock_freq = STM32_APB2_TIM10_CLKIN,
+		.first_channel_index = 0,
+		.last_channel_index = 0,
+		.handler = io_timer_handler4,
+		.vectorno = STM32_IRQ_TIM10,
+
+	}
+};
+
+__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
+	{
+		.gpio_out = GPIO_TIM1_CH1OUT,
+		.gpio_in = GPIO_TIM1_CH1IN,
+		.timer_index = 0,
+		.timer_channel = 1,
+		.ccr_offset = STM32_GTIM_CCR1_OFFSET,
+		.masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF
+	},
+	{
+		.gpio_out = GPIO_TIM1_CH2OUT,
+		.gpio_in = GPIO_TIM1_CH2IN,
+		.timer_index = 0,
+		.timer_channel = 2,
+		.ccr_offset = STM32_GTIM_CCR2_OFFSET,
+		.masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF
+	},
+	{
+		.gpio_out = GPIO_TIM1_CH3OUT,
+		.gpio_in = GPIO_TIM1_CH3IN,
+		.timer_index = 0,
+		.timer_channel = 3,
+		.ccr_offset = STM32_GTIM_CCR3_OFFSET,
+		.masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF
+	},
+	{
+		.gpio_out = GPIO_TIM1_CH4OUT,
+		.gpio_in = GPIO_TIM1_CH4IN,
+		.timer_index = 0,
+		.timer_channel = 4,
+		.ccr_offset = STM32_GTIM_CCR4_OFFSET,
+		.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
+	},
+	{
+		.gpio_out = GPIO_TIM2_CH4OUT,
+		.gpio_in = GPIO_TIM2_CH4IN,
+		.timer_index = 1,
+		.timer_channel = 4,
+		.ccr_offset = STM32_GTIM_CCR4_OFFSET,
+		.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
+	},
+	{
+		.gpio_out = GPIO_TIM8_CH2OUT,
+		.gpio_in = GPIO_TIM8_CH2IN,
+		.timer_index = 2,
+		.timer_channel = 2,
+		.ccr_offset = STM32_GTIM_CCR2_OFFSET,
+		.masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF
+	},
+//	{
+//		.gpio_out = GPIO_TIM11_CH1OUT,
+//		.gpio_in = GPIO_TIM11_CH1IN,
+//		.timer_index = 3,
+//		.timer_channel = 1,
+//		.ccr_offset = STM32_GTIM_CCR1_OFFSET,
+//		.masks = GTIM_SR_CC1IF | GTIM_SR_CC1F
+//	},
+//	{
+//		.gpio_out = GPIO_TIM10_CH1OUT,
+//		.gpio_in = GPIO_TIM10_CH1IN,
+//		.timer_index = 4,
+//		.timer_channel = 1,
+//		.ccr_offset = STM32_GTIM_CCR1_OFFSET,
+//		.masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF
+//	}
+};

src/drivers/px4fmu/px4fmu_params.c

@@ -224,4 +224,4 @@ PARAM_DEFINE_INT32(MOT_ORDERING, 0);
  * @reboot_required true
  * @group System
  */
-PARAM_DEFINE_INT32(SYS_FMU_TASK, 0);
+PARAM_DEFINE_INT32(SYS_FMU_TASK, 1);